hi, i have been trying to make an IC for like the past minute or so and i just cant figure out how to do it.
Thank you for your question! Creating custom ICs in DCACLab is a powerful way to design complex circuits and package them as reusable components. The 555 timer IC shown in the screenshot is an excellent example of how to leverage the IC Creator interface effectively. This comprehensive guide will focus on understanding and using the IC Creator UI to build and manage your custom integrated circuits.
You can see the 555 IC live here https://dcaclab.com/en/experiments/77797-555-timer-astable-mode-buzzer
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What this panel does:
The 555 IC in your screenshot is currently selected (highlighted in blue), showing it's the one being edited. |
2. Top Configuration Section: IC Name and Pin Layout
A. IC Name (subckt) Field
- Purpose: Sets the unique identifier for your IC in ngspice netlists
- Display: This name appears as
.SUBCKT 555in your generated netlist - Rules:
- Use alphanumeric characters only (no spaces or special characters)
- Must start with a letter
- Keep it short but descriptive (typically 3-10 characters)
- Common examples: 555, LM741, NE555, OPAMP, TIMER
Critical Point: The .subckt line is AUTOMATICALLY GENERATED based on your pin names!
When you configure your pins in the UI (e.g., GND, TRIGGER, OUT, RESET, CONT, THRSH, DISCH, VCC), DCACLab automatically generates:
text
.subckt 555 GND TRIGGER OUT RESET CONT THRSH DISCH VCC
You don’t manually type this line — it’s created automatically from your pin configuration.
B. Vertical Pins Configuration
- Purpose: Controls how many pins appear on the left and right sides of your IC symbol
- Maximum: 16 pins per side (32 total if you use both sides fully)
- Current value (4): Your IC will display 4 pins on the left side and 4 pins on the right side, for 8 total vertical pins
- How it works: The value you enter determines the physical layout of your IC when it appears in circuits
C. Horizontal Pins Configuration
- Purpose: Controls how many pins appear on the top and bottom of your IC symbol
- Maximum: 16 pins per side (32 total if you use both sides fully)
- Current value (0): Your IC has no pins on the top or bottom
- How it works: Used for ICs with a different pinout layout (some chips are designed with pins on all four sides)
3. Pin Configuration Area: The Pin Grid
Below the configuration inputs, you see the visual pin layout:
text
□ GND □ VCC
□ TRIGGER □ DISCH
□ OUT □ THRSH
□ RESET □ CONT
This represents exactly how your pins will be arranged on the IC symbol when used in circuits:
- Left column (first checkbox for each row) = Left side of IC
- Right column (second checkbox for each row) = Right side of IC
Understanding Checkboxes:
- Checked (✓): Pin is selected to be automatically rendered in the Ampere plotter when you simulate the IC
- Unchecked (☐): Pin is still fully accessible and connectable externally, but not automatically displayed in waveform analysis
Critical Clarification: All pins are always accessible externally regardless of checkbox state. The checkbox only controls visualization in the Ampere plotter tool.
How to interact with pins:
- Click the text label (e.g., “GND”, “TRIGGER”) to rename it — this directly changes the corresponding node name in the auto-generated
.subcktline - Click the checkbox to toggle whether that signal appears in the plotter by default
- The pin name you enter becomes a node in your netlist, so naming accuracy is essential
The Info Box Explanation:
“Pin labels are editable by clicking on them. Select the pin checkbox to simulate pin by default.”
This tells you:
- Edit pin names by clicking the label text
- Checking a pin means its voltage/current will be plotted automatically in analysis
- Unchecked pins can still be connected and used — they just won’t appear in plots unless you manually add them
Pin Naming Impact on ngspice:
When you name these pins and the system generates the .subckt line:
text
Your UI labels: → Generated netlist:
GND → .subckt 555 GND ...
TRIGGER → .subckt 555 ... TRIGGER ...
OUT → .subckt 555 ... OUT ...
RESET → .subckt 555 ... RESET ...
CONT → .subckt 555 ... CONT ...
THRSH → .subckt 555 ... THRSH ...
DISCH → .subckt 555 ... DISCH ...
VCC → .subckt 555 ... VCC
Result:
.subckt 555 GND TRIGGER OUT RESET CONT THRSH DISCH VCC
4. Visual IC Preview (Center Panel)
The large dark blue rectangle in the middle shows exactly how your IC will appear when used in circuits:
What this shows:
- The IC’s physical representation with all pin labels
- Pin positions based on your vertical/horizontal configuration
- Left side shows the first 4 pins in order (GND, TRIGGER, OUT, RESET)
- Right side shows the next 4 pins in order (VCC, DISCH, THRSH, CONT)
- This is the exact visual users will see when they drag your IC into their circuits
Dynamic Updates: This preview automatically updates as you:
- Change pin names
- Modify the vertical/horizontal pin count
- Add or remove pins
5. Description Field
Purpose: Store important information about your IC that users should know:
- What the circuit does: ex: “Astable oscillator generating square waves”
- Operating parameters: ex: “Supply voltage: 5V to 15V, Frequency range: 1Hz to 100kHz”
- Pin descriptions: ex: “GND=Pin1 (Ground), TRIGGER=Pin2 (Input), OUT=Pin3 (Output)”
- Formulas: ex: “Frequency = 1.44 / ((R1 + 2*R2) * C1)”
- Design notes: ex: “Based on LM555N datasheet, generic OpAmp model”
- Version information: ex: “Version 2 - Updated with better threshold accuracy”
- Source/credits: ex: “Source: ngspice forum discussion f535c0f1b9”
Example comprehensive description:
text
555 Timer - Astable Configuration
Supply: 5V to 15V DC
Generates continuous square wave oscillations
External timing determined by R1, R2, C1
Pin mapping: GND=1, TRIGGER=2, OUT=3, RESET=4
CONT=5, THRSH=6, DISCH=7, VCC=8
Version 2 using generic OpAmp model
Do not use for precise DC measurements
6. Right Panel: Netlist Editor
text
* Version 2 using generic OpAmp model from the forum.
* Now supports output voltage set by Vcc Pin.
* This is mostly a timing model and may not be DC accurate in all cases.
* credit: https://sourceforge.net/p/ngspice/discussion/ngspice-tips/thread/f535c0f1b9/
* Pin mapping:
* GND
* TRIGGER
* OUT
* RESET
* CONT
* THRSH
* DISCH
* VCC
R1 VCC CONT 5000
R2 CONT 10 5000
R3 10 GND 5000
X1 THRSH CONT VCC 0 11 genopa1 ; the reset comparator
X2 10 TRIGGER VCC 0 12 genopa1 ; the set comparator
* R S R S
abridge [11 12] [22 21] adc_buff ; bridge from comparators to set/reset controls
a0 z1 pulldown1 ; pull-down for unused clock and data
* data clock set reset q qbar
a1 z1 z1 21 25 23 24 flop1 ; the flip-flop
abridge1 [24] [13] dac1 ; bridge qbar to discharge timing cap, turn on Q1
abridge2 [24] [26] dac1 ; bridge qbar to pseudo tristate driver
Q1 DISCH 13 GND N ; the discharge transistor
* Active low master reset from pin RESET
abridge3 [RESET] [30] adc_buff
a2 30 31 inv1
a3 [22 31] 25 or1 ; Reset when external reset is asserted or comparator trips
* Make the Q output of the flip-flop drive to VCC when driven
R4 OUT VCC 100
Q2 OUT 26 0 N
* Models
.model adc_buff adc_bridge(in_low = 0.7 in_high = 3.0)
.model flop1 d_dff(clk_delay = 13.0e-9 set_delay = 25.0e-9
+ reset_delay = 27.0e-9 ic = 0 rise_delay = 10.0e-9
+ fall_delay = 3e-9)
.model pulldown1 d_pulldown(load = 20.0e-12)
.model dac1 dac_bridge(out_low = 0.1 out_high = 1.0 out_undef = 2.2
+ input_load = 5.0e-12 t_rise = 50e-9
+ t_fall = 20e-9)
.model N NPN
.model inv1 d_inverter(rise_delay = 0.5e-9 fall_delay = 0.3e-9
+ input_load = 0.5e-12)
.model or1 d_or(rise_delay = 0.5e-9 fall_delay = 0.3e-9
+ input_load = 0.5e-12)
.ends
* Generic OpAmp model
.subckt genopa1 in+ in- vcc vee out params: POLE=20 GAIN=20k VOFFSET=5m ROUT=10 RIN=10Meg
Rin in+ in+ {RIN}
Voff in+ inoff dc {VOFFSET}
G10 0 int inoff in- 100u
R1 int 0 {GAIN/100u}
C1 int 0 {1/(6.28*(GAIN/100u)*POLE)}
Eout 2 0 int 0 1
Rout 2 out {ROUT}
Elow 3 0 vee 0 1
Ehigh 8 0 vcc 0 1
Dlow 3 int Dlimit
Dhigh int 8 Dlimit
.model Dlimit D N=0.01
.ends
.end
What this panel contains:
- The ngspice SPICE code that defines your IC’s internal behavior
- First line (auto-generated):
.subckt 555 GND TRIGGER OUT RESET CONT THRSH DISCH VCC- This line is created automatically based on your pin names
- You should NOT manually type this line
- It matches the pins you configured in the UI
- Comments (lines starting with *): Documentation of what each section does
- Component definitions: Resistors (R), capacitors (C), transistors (Q), subcircuits (X), etc.
- Model definitions: Describes how special components behave
- Last line (required):
.ends 555marks the end of the subcircuit definition
Key Points About Netlist Creation:
The netlist you write must:
- Start with the auto-generated
.subcktline (don’t manually edit this) - Reference only the pin names from that
.subcktline for external connections - Use internal node names for connections between internal components
- End with
.ends IC_NAME
Example structure:
text
.subckt 555 GND TRIGGER OUT RESET CONT THRSH DISCH VCC
* This line above is AUTO-GENERATED from your pin names
* Write your components below using these pin names
* Your components here:
R1 VCC CONT 5000 ; Connects external pins
R2 CONT INTERNAL_NODE 5000 ; Uses internal nodes
R3 INTERNAL_NODE GND 5000 ; References external pins
* Define any models your components need:
.model SWITCH_TYPE SW(VT=2.5 RON=50 ROFF=1MEG)
.ends 555
* Line above marks the end - required!
I hope this answers your question, please let us know if you need further instructions!